1. Field of the Invention
The present invention relates to a connector for changing the setting of a memory bus, in accordance with whether a memory module is inserted into each memory slot, and relates also to a computer system including the connector.
2. Description of the Related Art
In a computer system, such as a personal computer, etc., many devices are usually mounted on a predetermined printed-circuit board. One example of such a printed-circuit board is the motherboard of personal computers. On the motherboard, a CPU (Central Processing Unit), a main memory, a main controller, a BIOS-ROM (Basic Input/Output System-ROM), etc. are mounted. The CPU and the main memory send various signals (address, data, control, etc.) to each other through a memory bus, for information exchange.
The main memory is a RAM (Random Access Memory). The main memory is used as a memory area of the OS (Operating System) or application programs. Additionally, the main memory provides the CPU with a work area. The memory controller controls access operations of the CPU with respect to a plurality of memory chips included in the main memory.
In recent computer systems, the motherboard has a plurality of memory slots. Each of the plurality of memory slots has such a structure that a memory module can be inserted thereto or removed therefrom. Because of this structure, the main memory can be expanded. In each memory module, several memory chips are arranged on a single module substrate.
When the computer system is operated, it is necessary that at least one memory module be inserted in at least one memory slot. The number of memory modules to be inserted into the memory slots can be adjusted in accordance with the size of a program executed by the computer system.
As seen from FIG. 1, a memory controller 114 is electrically coupled to four memory slots 10A, 101B, 101C and 101D, through a memory bus 118. DIMM (Dual Inline Memory Module) 110C and 110D are inserted respectively in the memory slots 101C and 101D. In this case, the memory slots 101A and 101B are empty.
In many cases, the signal transmission characteristics in the system shown in FIG. 1 are optimized in the case where the memory module is inserted in each of the entire memory slots 101A to 101D. Thus, as shown in FIG. 1, without the memory modules corresponding to the memory slots 101A and 101B, in the case where signals are sent from the memory controller 114 to the memory bus 118, signal reflection occurs in the memory slots 101A and 101B.
In addition, generally, the impedance of the memory controller 114 is different from the characteristic impedance of the memory bus 118. This impedance difference further causes signal reflection. A part of reflected signals in the memory slots 101A and 101B are reflected again in the memory controller 114.
Those signals reflected in the memory controller 114 are superposed on output signals of the memory controller 114. The superposition of the signals causes deterioration of waveforms of signals on the memory bus 118. In this manner, the reflected signals causes undesirable operations of the memory modules 110C and 110D inserted respectively in the memory slots 101C and 101D. For appropriate operations of a computer having memory modules or without memory modules, it is desired that the computer have such a structure for transmitting adequate signals between the memory controller and the memory modules.
There are several known techniques for reducing the undesirable effect of the signal reflection. For example, to reduce the signal amplification, the series resistance is included in a memory bus. In another example, the memory controller limits the driving range of the memory bus. In addition, the reduction in the signal line length on the motherboard may possibly improve the deterioration of the signal waveform.
To have high-speed operations of the CPU, it is necessary that the memory be operable at high speed. Recently, high-speed memory buses, which are operable at several hundred MHz, are realized.
According to conventional techniques, it is difficult to keep the transmission waveforms of signals, independently from the number of the inserted memory modules.
Unexamined Japanese Patent Application KOKAI Publication Nos. S61-273883, H1-236887, H9-161903, and H11-312559 each discloses a technique related to the switching structure that can change the setting of circuits in a case where a plug connector is inserted in a receptacle connector.
The present invention has been made in consideration of the above. It is accordingly an object of the present invention to provide a technique for desirably transmitting signals on high-speed memory buses, regardless of whether at least one memory module is inserted in at least one memory connector.
Another object thereof is to provide a technique for relieving the limitation on the driving range of the memory controller and the limitation on the length of the signal line on the motherboard.
In order to achieve the above objects, according to the first aspect of the present invention, there is provided a computer system comprising:
a plurality of memory slots each of which has a structure for accepting a memory module inserted therein and includes a plurality of connector terminals for being in contact with module pins formed in said memory module;
a memory bus which includes a plurality of signal lines coupled to the at least one connector terminal of each of said plurality of memory slots;
a memory controller which is coupled to a plurality of memory chips on said memory module inserted in at least one of said plurality of memory slots, through said memory bus; and
at least one electric load, and wherein
said plurality of memory slots includes
a first part of memory slots which is coupled to said memory module and provides electrical contact between the plurality of signal lines of said memory bus and the module pins, respectively, using their corresponding connector terminals, and
a second part of memory slots which is not coupled to said memory module and provides electric contact between the plurality of signal lines of said memory bus and the electric load using their corresponding connector terminals.
Impedance of the electric load may approximately be equal to impedance of said memory module.
The electric load may be at least one series circuit including a resistance device and a capacitive device or at least one capacitive device.
The resistance device may be a variable resistor; and/or the capacitive device may be a variable capacitor.
In order to achieve the above objects, according to the second aspect of the present invention, there is provided a computer system comprising:
a plurality of memory slots each of which has a structure for accepting a memory module inserted therein and includes a plurality of connector terminals for being in contact with module pins formed in said memory module;
a memory bus which includes a plurality of signal lines coupled to at least one of said plurality of connector terminals of each of said plurality of memory slots;
a memory controller which is coupled to a plurality of memory chips on said memory module inserted in at least one of said plurality of memory slots, through said memory bus; and
a plurality of impedance matching circuits, and wherein:
said plurality of connector terminals included in each of said plurality of memory slots includes
a first-type connector pin which is coupled to one of said plurality of signal lines of said memory bus, and
a second-type connector pin which is coupled to a corresponding electric load;
said first-type connector pin and said second-type connector pin are electrically in contact with each other, in a case where the memory module is not inserted in each of said plurality of memory slots; and
said first-type connector pin and said second-type connector pin are electrically insulated from each other, and the first-type connector pin and said module pins of said memory module are electrically in contact with each other, in a case where the memory module is coupled to each of said memory slots.
Impedance of said electrical load may approximately be equal to impedance of said memory module.
The electric load may be at least one series circuit including a resistance device and a capacitive device or at least one capacitive device.
The resistive device may be a variable resistor, and/or said capacitive device may be a variable capacitor.
In order to achieve the above objects, according to the third aspect of the present invention, there is provided a switch connector which is adaptable to a computer system including, a memory bus, at least one memory slot and an electrical load, wherein:
said switch connector couples one of a plurality of signal lines of said memory bus to one of a plurality of module pins of a memory module, in a case where said memory module is inserted in said at least one memory slot; and
said switch connector couples the one of said plurality of signal lines of said memory bus to said electric load, in a case where said memory module is not inserted in said at least one memory slot.
The switch connector may be disposed inside said at least one memory slot.
In order to achieve the above objects, according to the fourth aspect of the present invention, there is provided a switch connector which is adaptive to a computer system including, a memory bus, at least one memory slot and an electrical load, comprising:
a first connector pin which is coupled to one of a plurality of signal lines of said memory bus; and
a second connector pin which is coupled to said electric load, and wherein
said switch connector provides electric contact between said first connector pin and said second connector pin, in a case where a memory module is not inserted in said at least one memory slot, and
said switch connector insulates said first connector pin from said second connector pin, in a case where said memory module is not inserted in said at least one memory slot.
One end of said first connector pin may be fixed on a casing of said at least one memory slot; and
other end of said first connector pin provides flexible electric contact with said second connector pin or with one of a plurality of module pins of said memory module.
In order to achieve the above objects, according to the fifth aspect of the present invention, there is provided a method of controlling operations of a computer system including a plurality of memory slots, comprising:
arranging a plurality of memory connectors on each of said plurality of memory slots;
coupling a plurality of bus lines respectively to said plurality of memory connectors;
coupling at least one impedance matching circuit to at least one of said plurality of memory connectors;
coupling said plurality of bus lines to a memory module, in at least one of said plurality of memory slots in which the memory module is inserted; and
coupling said at least one impedance matching circuit to at least one of said plurality of bus lines, in at least one of said plurality of memory slots in which the memory module is not inserted.
The method may further comprise:
coupling said plurality of bus lines respectively to first-type connector pins included in each of said plurality of memory connectors;
coupling said at least one impedance matching circuit to at least one of second-type connector pins included in at least one of said plurality of memory connectors;
providing electric contact between said first-type connector pins and module pins of the memory module, in the at least one of said plurality of memory slots in which the memory module is inserted; and
providing electric contact between said first-type connector pins and said second-type connector pins, in at least one of said plurality of memory slots in which the memory module is not inserted.